The AMD EPYC 9000 “Genoa’ CPU family featuring the brand new Zen 4 core architecture has been leaked by Yuuki_AnS. The lineup list includes several SKUs with their proper naming, core counts & clock speeds.
AMD EPYC 9000 Genoa CPU Family Leaked: 18 SKUs In The Works With Up To 96 Zen 4 Cores, 384 MB Cache, 400W TDP
Starting with the details, AMD has already announced that EPYC Genoa would be compatible with the new SP5 platform which brings a new socket so SP3 compatibility would exist up till EPYC Milan. The EPYC Genoa processors would also feature support for new memory and new capabilities. In the latest details, it is reported that the SP5 platform will also feature a brand new socket that will feature 6096 pins arranged in the LGA (Land Grid Array) format. This will be by far the biggest socket that AMD has ever designed with 2002 more pins than the existing LGA 4094 socket.
AMD EPYC Milan Zen 3 vs EPYC Genoa Zen 4 Size Comparisons:
|CPU Name||AMD EPYC Milan||AMD EPYC Genoa|
|Process Node||TSMC 7nm||TSMC 5nm|
|Core Architecture||Zen 3||Zen 4|
|Zen CCD Die Size||80mm2||72mm2|
|Zen IOD Die Size||416mm2||397mm2|
|Substrate (Package) Area||TBD||5428mm2|
|Socket Name||LGA 4094||LGA 6096|
|Max Socket TDP||450W||700W|
The socket will support AMD’s EPYC Genoa and future generations of EPYC chips. Talking about Genoa CPUs themselves, the chips will pack a mammoth 96 cores and 192 threads. These will be based on AMD’s brand new Zen 4 core architecture which is expected to deliver some insane IPC uplifts while utilizing the TSMC 5nm process node.
To get to 96 cores, AMD has to pack more cores in its EPYC Genoa CPU package. AMD is said to achieve this by incorporating a total of up to 12 CCD’s in its Genoa chip. Each CCD will feature 8 cores based on the Zen 4 architecture. That aligns with the increased socket size and we could be looking at a massive CPU interposer, even larger than the existing EPYC CPUs. The CPU is said to feature TDPs of 320W which will be configurable up to 400W. You can find more details regarding the SP5 platform here.
So coming to the SKUs, Yuuki_AnS has leaked a total of 18 SKUs of which 6 are still in ES state but the rest of the 12 SKUs are production-ready. The lineup will have four ‘F’ or Frequency-Optimized SKUs, three ‘P’ single-socket SKUs, and 11 standard SKUs. Do note that these are only the SKUs that have been leaked and there could be more in the works. With that said, there will be several EPYC 9000 Genoa CPU configs ranging from 16, 24, 32, 48, 64, 84, and up to 96 Zen 4 cores. Certain SKUs will come with partially enabled chiplets for increased cache and we are getting up to 384 MB of L3 cache. Do remember that V-Cache variants “Genoa-X’ are also planned so we will be getting a total of 1152 MB LLC on those parts.
Clock frequencies vary from CPU to CPU with certain high-TDP parts going as high as 3.8 GHz while the top 96C parts run around 2.0-2.15 GHz at 320-400W TDPs. It looks like the top SKUs will include the EPYC 9654P which has 96 cores, 192 threads, 384 MB of cache, clock speeds of up to 2.15 GHz & a 360W TDP while a 400W variant for the dual-socket SP5 platform is also in the works and listed with the same clock speeds in ES state but a higher 400W TDP. Following is the EPYC 9000 Genoa stack:
AMD EPYC 9000 Genoa CPU SKUs ‘Preliminary’ Specs:
|CPU Name||Cores / Threads||Cache||Clock Speeds||TDP||State|
|EPYC 9654P||96/192||384 MB||2.0-2.15 GHz||360W||Production Ready|
|EPYC 9534||64/128||256 MB||2.3-2.4 GHz||280W||Production Ready|
|EPYC 9454P||48/96||256 MB||2.25-2.35 GHz||290W||Production Ready|
|EPYC 9454||48/96||256 MB||2.25-2.35 GHz||290W||Production Ready|
|EPYC 9354P||32/64||256 MB||2.75-2.85 GHz||280W||Production Ready|
|EPYC 9354||32/64||256 MB||2.75-2.85 GHz||280W||Production Ready|
|EPYC 9334||32/64||128 MB||2.3-2.5 GHz||210W||Production Ready|
|EPYC 9274F||24/48||256 MB||3.4-3.6 GHz||320W||Production Ready|
|EPYC 9254||24/48||128 MB||2.4-2.5 GHz||200W||Production Ready|
|EPYC 9224||24/48||64 MB||2.15-2.25 GHz||200W||Production Ready|
|EPYC 9174F||16/32||256 MB||3.6-3.8 GHz||320W||Production Ready|
|EPYC 9124||16/32||64 MB||2.6-2.7 GHz||200W||Production Ready|
|EPYC 9000 (ES)||96/192||384 MB||2.0-2.15 GHz||320-400W||ES|
|EPYC 9000 (ES)||84/168||384 MB||2.0 GHz||290W||ES|
|EPYC 9000 (ES)||64/128||256 MB||2.5-2.65 GHz||320-400W||ES|
|EPYC 9000 (ES)||48/96||256 MB||3.2-3.4 GHz||360W||ES|
|EPYC 9000 (ES)||32/64||256 MB||3.2-3.4 GHz||320W||ES|
|EPYC 9000 (ES)||32/64||256 MB||2.7-2.85 GHz||260W||ES|
Other than that, it is stated that AMD’s EPYC Genoa CPUs will feature 128 PCIe Gen 5.0 lanes, 160 for a 2P (dual-socket) configuration. The SP5 platform will also feature DDR5-5200 memory support which is some insane improvement over the existing DDR4-3200 MHz DIMMs. But that’s not all, it will also support up to 12 DDR5 memory channels and 2 DIMMs per channel which will allow up to 3 TB of system memory using 128 GB modules. The AMD EPYC 9000 Genoa CPU lineup is expected to launch in the second half of this year.
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